Park, Junekyun

Semiconductor Display

Position

visiting professor

Tel.

+82 31-750-5926

E-Mail

junek@gachon.ac.kr

Location

About:

"Quality Driven by Data, Reliability Proven by Science" Q&R Data Analysis Lab changes the quality paradigm of the semiconductor and display industry. Quality: Zero-defect orientation through statistical process control and data mining Reliability: Predicting life through accelerated life testing and physical analysis Data Science: Developing AI-Powered Anomaly Detection and Yield Optimization Algorithms We design the tomorrow of technology through data. - Physics of Failure, Accelerated Life Test (ALT), and Failure Analysis. - Yield Optimization, Zero Defect, and Automotive Semiconductor Reliability (AEC-Q100). "Beyond Defects, Toward Perfection" "Predicting Reliability through Data Intelligence" "The Standard for Future Quality"

Education:
  • 16.03 ~ 21.02 SUNGKYUNKWAN University Department of Electronic, Electrical and Computer Engineering Ph. D.

  • 14.03 ~ 16.02 SUNGKYUNKWAN University Department of Semiconductor Display Engineering Master

  • 90.03 ~ 97.03 SUNGKYUNKWAN University Department of Electronic Engineering B.S.

Experience:
  • 24.9 ~ Gachon University ,Department of Semiconductor Display visiting professor

  • 97.01 ~ Samsung Electronics Co., Ltd semiconductor Quality & Reliability Part leader

Honors & Specialities:


  • 2022.03 Improving hole injection ability using a newly proposed WO3/NiOx bilayer in solution processed quantum dot light-emitting diodes (Current Applied Physics, March 2022)

  • 2021.03 Time Dependent Variability in Advanced FinFET Technology for End-of-Lifetime Reliability Prediction (2021 IEEE International Reliability Physics Symposium (IRPS))

  • 2020.12 Reliability on Evolutionary FinFET CMOS Technology and Beyond (2020 IEEE International Electron Devices Meeting (IEDM))

  • 2020.09 Improvement of Quantum Dot Light Emitting Device Characteristics by CdSe/ZnS Blended with HMDS (Hexamethyldisilazane) (Applied Sciences, September 2020)

  • 2020.03 Advanced Self-heating Model and Methodology for Layout Proximity Effect in FinFET Technology (2020 IEEE International Reliability Physics Symposium (IRPS))

  • 2020.03 Reliability of Advanced FinFET Technology Nodes Beyond Planar: Invited (2020 4th IEEE Electron Devices Technology & Manufacturing Conference)

  • 2019.10 Improving Charge-Imbalanced Problem of Quantum Dot Light-Emitting Diodes with TPBi/ZnO Electron Transport Layer (Journal of Nanoscience and Nanotechnology, October 2019)

  • 2019.09 Enhanced Reliability of 7-nm Process Technology Featuring EUV (IEEE Transactions on Electron Devices, November 2019)

  • 2019.06 Enhanced Reliability of 7nm Process Technology featuring EUV (2019 Symposium on VLSI Technology)

  • 2019.03 Localized Layout Effect Related Reliability Approach in 8nm FinFETs Technology: From Transistor to Circuit (2019 IEEE International Reliability Physics Symposium (IRPS))

  • 2018.03 Three-dimensional (3D) Characterization of Electromigration Failure Mechanism of Solder Joints in WLP using X-ray Microscopy (2018 IEEE International Symposium on the Physical and Failure Analysis)

  • 2018.03 Effects of Far-BEOL anneal on the WLR and product reliability characterization of FinFET process technology (2018 IEEE International Reliability Physics Symposium (IRPS))

  • 2018.03 Reliability characterization of advanced CMOS image sensor (CIS) with 3D stack and in-pixel DTI (2018 IEEE International Reliability Physics Symposium (IRPS))

  • 2018.03 A systematic study of gate dielectric TDDB in FinFET technology (2018 IEEE International Reliability Physics Symposium (IRPS))

  • 2017.03 New insights into 10nm FinFETBTI and its variation considering the local layout effects (2017 IEEE International Reliability Physics Symposium (IRPS))

  • 2013.10 Effects of N-rich TiN capping layer on reliability in gate-last high-k/Metal Gate MOSFETs (224th ECS Meeting, October 2013)

  • 2013.10 Effects of N-Rich TiN Capping Layer On Reliability in 20nm Gate-Last High-k/Metal Gate Mosfets (ECS Meeting Abstracts, October 2013)

  • 2013.03 Technology scaling on High-K & Metal-Gate FinFET BTI reliability (2013 IEEE International Reliability Physics Symposium (IRPS))

  • 2012.03 Gate stack process optimization for TDDB improvement in 28nm high-k/metal gate nMOSFETs (2012 IEEE International Reliability Physics Symposium (IRPS))

  • 2011.03 Frequency dependent TDDB behaviors and its reliability qualification in 32nm high-k/metal gate CMOSFETs (2011 IEEE International Reliability Physics Symposium (IRPS))


Patent

  • 2020.03 Organic Light emitting device (US 10,651,410 B2)

  • 2020.03 Semiconductor device including a gate structure with a wider end portion than a linear portion (US 2020/0144384 A1)

  • 2020.02 Organic Light emitting device (US 10,553,804 B2)

  • 2020.01 Semiconductor device and method for fabricating the same (US 2020/0035675 A1)

  • 2019.10 Semiconductor device including test structure (US 2019/0326187 A1)

  • 2019.03 유기발광소자 (국내 특허 제10-1959812호)

  • 2018.09 FinFET and Method of forming Fin of the FinFET (US 9,892,977 B2)

  • 2018.08 Semiconductor devices including electrodes for temperature measurement (US 10,048,137 B2)

  • 2017.06 발광다이오드용 발광층 및 이의 제조방법 (국내특허 제10-1751734호)

  • 2015.09 Semiconductor devices including electrodes for temperature measurement (US2105/0098489 A1)



Start your journey at Gachon Semiconductor College

Join a vibrant community of thinkers, creators, and leaders.

CTA Image
Image
Image

Start your journey at Gachon Semiconductor College

Join a vibrant community of thinkers, creators, and leaders.

CTA Image
CTA Image

Start your journey at Gachon Semiconductor College

Join a vibrant community of thinkers, creators, and leaders.

CTA Image
CTA Image